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interrupts disabled-state

См. также в других словарях:

  • Interrupt priority level — The interrupt priority level (IPL) is a part of the current system interrupt state, which indicates the interrupt requests that will currently be accepted. The IPL may be indicated in hardware by the registers in a Programmable Interrupt… …   Wikipedia

  • Test-and-set — In computer science, the test and set instruction is an instruction used to both test and (conditionally) write to a memory location as part of a single atomic (i.e. non interruptible) operation. This means setting a value, but first performing… …   Wikipedia

  • Fetch-and-add — In computer science, the fetch and add CPU instruction is a special instruction that atomically modifies the contents of a memory location. It is used to implement Mutual exclusion and concurrent algorithms in multiprocessor systems.In… …   Wikipedia

  • Immunity Aware Programming — When writing firmware for an embedded system, immunity aware programming is a set of programming techniques used in an attempt to tolerate transient errors in the program counter or other that would otherwise lead to failure.Immunity aware… …   Wikipedia

  • PIC microcontroller — PIC microcontrollers in DIP and QFN packages …   Wikipedia

  • literature — /lit euhr euh cheuhr, choor , li treuh /, n. 1. writings in which expression and form, in connection with ideas of permanent and universal interest, are characteristic or essential features, as poetry, novels, history, biography, and essays. 2.… …   Universalium

  • PDP-8 — A PDP 8 on display at the Smithsonian s National Museum of American History in Washington, D.C.. This example is from the first generation of PDP 8s, built with discrete transistors and later known as the Straight 8. The 12 bit PDP 8 was the… …   Wikipedia

  • Orphanage — For other uses, see Orphanage (disambiguation). Former Berlin Pankow orphanage …   Wikipedia

  • Non-maskable interrupt — A non maskable interrupt (NMI) is a computer processor interrupt that cannot be ignored by standard interrupt masking techniques in the system. It is typically used to signal attention for non recoverable hardware errors. (Some NMIs may be masked …   Wikipedia

  • DioneOS — (pronounced /djoneos/) is multitasking preemptive, real time operating system. The system is designed for Texas Instruments MSP430x microcontrollers. Target microcontroller platform has limited resources, i.e. system clock frequency in tens of… …   Wikipedia

  • Intel 8080 — Infobox Computer Hardware Cpu name = Intel 8080 caption = An Intel C8080A processor. produced start = mid 1974 produced end = slowest = 2 | slow unit = MHz fastest = | fast unit = MHz manuf1 = Intel arch = pre x86 pack1 = 40 pin DIPThe Intel 8080 …   Wikipedia

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